Senior/Staff DFT Engineer
About Us
Axelera AI is not your regular deep-tech startup. We are creating the next-generation AI platform to support anyone who wants to help advancing humanity and improve the world around us.
In just four years, we have raised a total of $370 million and have built a world-class team of 220+ employees (including 49+ PhDs with more than 40,000 citations), both remotely from 18 different countries and with offices in Belgium, France, Switzerland, Italy, the UK, headquartered at the High Tech Campus in Eindhoven, Netherlands.
We have also launched our Metis™ AI Platform, which achieves a 3-5x increase in efficiency and performance, and have visibility into a strong business pipeline exceeding $100 million.
Our unwavering commitment to innovation has firmly established us as a global industry pioneer.
Are you up for the challenge?
Position Overview
We are looking for a Senior/Staff DFT Engineer to join our multicore in-memory-compute SoC team.
You will design, implement, and validate test solutions for our complex SoCs, collaborating with a talented team of engineers across Europe. This is your chance to work on cutting-edge architectures, improve silicon testability, and make a real impact in a fast-moving startup environment.
Key responsibilities:
- Implement scan insertion, ATPG, Memory BIST, JTAG/IJTAG, and fault simulation flows.
- Collaborate with RTL, verification, and physical design teams to integrate DFT solutions efficiently.
- Support silicon bring-up and debug, helping to optimize test coverage and yield.
- Contribute to methodology improvements and share best practices with team members.
Qualifications:
- Experience: minimum of 5 years in DFT engineering, preferably with complex SoC projects.
- Skills: SystemVerilog RTL, TCL, Python, Unix/Linux workflows.
- Core Knowledge: Hierarchical scan, ATPG, Memory BIST, JTAG/IJTAG, fault simulation, silicon debug, gate-level verification.
- Tools: Siemens, Synop...