Senior PCB Layout Design Engineer, Intelligence Systems
Anduril Industries is seeking a Senior PCB Layout Design Engineer to join their Intelligence Systems team in Reston, Virginia. This role involves full-cycle PCB design, including requirements collection, schematic design, component selection, layout supervision, bring-up, testing, debugging, and system integration. The position supports Anduril's mission to transform U.S. and allied military capabilities with advanced technology.
Key responsibilities include collaborating with engineers to produce printed circuit board designs for Anduril's products, applying modern design standards to create high-reliability, manufacturable assemblies, and implementing combinations of high-speed digital, precision analog, RF, and high-power designs. The engineer will also assist in establishing internal guidelines for design for manufacturing (DFM) and design for assembly (DFA), refine team processes for PCB design and library management, coordinate external PCB design resources during design surges, and manage multiple concurrent projects in a fast-paced environment.
Required qualifications include an active U.S. Secret security clearance, an associate's degree in electrical engineering or similar, and over five years of professional experience in PCB layout design. Candidates should have the ability to read and interpret schematics, apply best practices for each design, determine work priorities based on management direction, and possess expertise in IPC standards, PCB fabrication processes, and Altium Designer CAD tools. Experience with developing component libraries, working in team environments, and excellent communication skills with fabrication houses are also essential. Familiarity with various board types, including high-density and high-layer count digital designs, power electronics, flex circuits, and RF circuits, as well as experience with high-speed digital interfaces and controlled impedance routing requirements, is required.
Preferred qualifications include experience with dense high-pin count packages (FPGA fanout), designing with high-speed digital interfaces, SERDES, and DDR memory structures, designing with SoC FPGAs, using Siemens Xpedition or Cadence Allegro ECAD tools, a deep understanding of sequential lam structures, and designing in air-gapped network environments.
The salary range for this role is $146,000 to $194,000 USD annually. Anduril offers comprehensive medical, dental, and vision plans at little to no cost, income protection through life and disability insurance, generous time off including a holiday hiatus in December, caregiver and wellness leave, family planning and parenting support, mental health resources, professional development reimbursement, company-funded commuter benefits, and relocation assistance depending on role eligibility. Retirement savings plans, including traditional 401(k), Roth, and after-tax options, are also available.