Staff Engineer, SRAM Circuit Design

🇺🇸 San Jose, California
$2K - $3K Annual
Posted 2 months ago
Expires June 9, 2026
Full TimeOn-siteEngineering

Samsung Semiconductor is seeking a Staff Engineer specializing in SRAM Circuit Design to lead the development of next-generation SRAM solutions. This role involves driving the end-to-end design of high-performance, low-power memory circuits integral to cutting-edge semiconductor products, directly impacting the power, performance, and area efficiency of future computing, mobile, and AI platforms.

Key responsibilities include designing and developing SRAM memory arrays, such as bit cells, sense amplifiers, decoders, and control circuits for advanced process nodes (e.g., 2nm, 3nm, and 5nm). The engineer will optimize SRAM designs for performance, power, area, and yield, develop custom layouts, perform physical design verifications, and evaluate trade-offs to meet design targets. Additionally, the role involves developing and improving SRAM design methodologies, including automation scripts for design, simulation, and verification, collaborating with product and test engineers to develop test plans and support silicon bring-up, mentoring junior engineers, and contributing to patents and technical papers to advance SRAM technology.

The ideal candidate holds a bachelor's degree in electrical engineering with 10+ years of industry experience or a master's degree with 8+ years of experience. Required qualifications include prior experience in SRAM or memory circuit design with a proven track record in advanced process nodes, a strong understanding of semiconductor device physics and process technology (FinFET, GAA, SOI, etc.), expertise in SRAM architecture, familiarity with timing and power analysis, proficiency in circuit simulation and design tools (Spectre, HSPICE, Cadence Virtuoso), knowledge of scripting languages (Python, Perl, TCL) for automation, and strong cross-functional collaboration and communication skills. Experience with advanced technology nodes (e.g., 5nm, 3nm, or beyond), knowledge of SRAM compiler development, low-power SRAM design techniques, and a background in silicon debug and root-cause analysis are also desirable.

The position offers a competitive salary range of $163,000 to $253,000 annually, along with a comprehensive benefits package that includes medical, dental, vision, and 401(k) plans. Employees enjoy 4+ weeks of paid time off per year, plus holidays and sick leave, a charitable giving match program, stipends for fertility care or adoption, medical travel support, on-demand apps and paid therapy sessions for emotional wellness, onsite café and gym facilities, virtual fitness classes, and a flexible work environment.

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