Hardware Validation & Debug Engineer

The Hardware Validation & Debug Engineer at Graphcore is responsible for validating and debugging the company's silicon platforms to ensure they are ready to power advanced AI workloads globally. This role involves direct collaboration with architecture, silicon, hardware, and firmware teams to influence product quality, performance, and reliability across the hardware stack.

Key responsibilities include leading hands-on system validation in the lab, debugging complex PCIe, Ethernet, and SerDes issues, driving root-cause analysis, and facilitating the bring-up of new platforms. The engineer will work closely with cross-functional teams to address and resolve hardware challenges.

Candidates should have strong experience in validating and debugging complex hardware systems, hands-on expertise with PCIe Root Complex bring-up and protocol analysis, and experience with Ethernet SerDes systems and high-speed interfaces. Proficiency in using oscilloscopes, BERT systems, VNA/TDR equipment, and protocol analyzers is essential, along with strong root-cause analysis skills across signal integrity and subsystem issues.

Graphcore offers benefits such as unlimited annual leave, up to 5% matched pension, phantom equity, flexible working arrangements, collaborative office spaces, free food and an on-site barista, health cash plan, income protection, life assurance, and additional options like private medical insurance and dental plans.

The company fosters a culture that values technical depth, ownership, and collaboration. Engineers are encouraged to investigate issues, challenge assumptions, and drive decisions forward, working hands-on in the lab with real systems and data. Graphcore emphasizes inclusivity and diversity, welcoming individuals from all backgrounds and experiences.